1. Field of the Invention
The present invention relates to a solid-state image sensing device and a camera system using the same.
2. Description of the Related Art
In recent years, the demand for solid-state image sensing devices has been rapidly increasing for use in image capturing apparatuses, such as, mainly, digital still cameras and video camcorders. As such solid-state image sensing devices, CCDs (Charge Coupled Devices) or MOS solid-state image sensing devices have been used. The former, as compared to the latter, are widely used as high-definition image sensing devices, due to their high sensitivity and low noise, but, on the other hand, have some disadvantages. Specifically, the power consumption and the drive voltage are high and the cost is high since a general semiconductor manufacturing process cannot be used. Additionally, it is difficult to integrate peripheral circuits, such as a drive circuit.
For these reasons, much effort has been devoted to the development of an amplifying-type MOS solid-state image sensing devices. In an amplifying-type solid-state image sensing devices, signal charge that is stored in a photodiode is introduced into the control electrode of an amplifying transistor, provided in each pixel, is amplified by the amplifying transistor, and the resulting output is output from the main electrode thereof in accordance with the amount of signal charge. In particular, for amplifying-type solid-state image sensing devices, efforts have been directed to the development of CMOS sensors using MOS transistors as amplifying transistors. The demand for portable telephones is projected to increase, and it is expected that MOS solid-state image sensing devices, which can overcome the above-described disadvantages of CCDs, will be applied to portable apparatuses.
FIG. 13 is a circuit diagram of a typical example of a CMOS sensor pixel for use in a solid-state image sensing device.
In FIG. 13, reference numeral 30 represents a unit pixel, 1 is a photodiode for storing signal charge generated from incident light, 6 is a amplifying MOS transistor for outputting an amplified signal in accordance with the amount of signal charge, and 3 is a floating diffusion (hereinafter may be referred to as “FD”) region which receives a signal charge and connects the signal charge to the gate electrode of the amplifying MOS transistor 6. Reference numeral 2 represents a transfer MOS transistor for transferring signal charge stored in the photodiode 1 to the FD region 3, 4 is a reset MOS transistor for resetting the FD region 3, and 5 is a selection MOS transistor for selecting an output pixel. Reference numeral 9a is a control line for applying a pulse to the gate of the transfer MOS transistor 2 to control the charge-transfer operation, 9b is a control line for applying a pulse to the gate of the reset MOS transistor 4 to control the reset operation, and 9c is a control line for applying a pulse to the gate of the selection MOS transistor 5 to control the selection operation. Reference numeral 10a is a power-supply wire which is connected to the drain of the amplifying MOS transistor 6 and the drain of the reset MOS transistor 4 to provide a power-supply potential thereto. Reference numeral 10b is an output line for outputting an amplified signal of a selected pixel, 8 is a constant-current MOS transistor that operates as a constant current source and that forms a source follower in conduction with the amplifying MOS transistor 6, and 10c is a wire for supplying a potential to the gate electrode of the MOS transistor 8 so as to operate thereof at constant current.
An arrangement of a plurality of the above-described pixels 30 in a two-dimensional matrix provides a pixel area for a two-dimensional solid-state image sensing device. In the matrix configuration, the output line 10b is used as a common line for pixels in the same column and the control lines 9a, 9b, and 9c are each used as a common line for pixels in the corresponding row. Only pixels in a row that is selected by the control line 9c output signals to the corresponding output line 10b. 
FIG. 14 is a circuit diagram of another pixel for a conventional solid-state image sensing device. In FIG. 14, reference numeral 1 represents a photodiode, 2 is a transfer MOS transistor for transferring charge of the photodiode 1, and 3 is a floating diffusion region for temporarily storing the transferred charge. Reference numeral 4 is a reset MOS transistor for resetting the floating diffusion region 3 and the photodiode 1, 5 is a selection MOS transistor for selecting one row in the array, and 6 is a source-follower MOS transistor. This source-follower MOS transistor 6 converts charge in the floating diffusion region 3 into a voltage and amplifies the voltage using a source-follower amplifier. Reference numeral 7 represents a read line, which is used as a common line in the same column, for reading a pixel voltage signal, and reference numeral 8 represents a constant current source for providing constant current to the read line 7.
The operation of this conventional solid-state image sensing device will be briefly described below. The photodiode 1 converts incident light into charge, and the transfer MOS transistor 2 causes the charge to be stored in the floating diffusion region 3. The potential of the floating diffusion region 3 and the photodiode 1 is reset to a constant potential in advance by opening the reset MOS transistor 4 and the transfer MOS transistor 2. Thus, the potential of the floating diffusion region 3 varies in accordance with charge generated from incident light.
The potential of the floating diffusion region 3 is amplified by the source-follower MOS transistor 6 and is output to the read line 7. When the selection MOS transistor 5 is open, that pixel is selected. An output circuit (not shown) detects optical signal components by determining the difference between the potential of the floating diffusion region 3 after optical signals are stored and the reset potential of the floating diffusion region 3.
FIG. 15 is a schematic sectional view of the solid-state image sensing device shown in FIG. 13. This schematic sectional view includes portions corresponding to the photodiode, the transfer MOS transistor, and the FD region. In this figure, reference numeral 11 represents an n-type semiconductor substrate, 12 is a p well, and 15 is an n-type semiconductor region formed in the p well 12. The p well 12 and the n-type semiconductor region 15 constitute a photodiode. Signal charge generated from incident light is stored in the n-type semiconductor region 15. Reference numeral 14 is a gate electrode of the transfer MOS transistor 2 shown in FIG. 13. Reference numeral 18 represents an FD region, which is an n-type semiconductor region formed in the p well 12 and also serves as the drain region of the transfer MOS transistor 2. The source region of the transfer MOS transistor corresponds to the n-type semiconductor region 15. Reference numeral 20 represents a wire that is connected to the FD region 18 and also to the gate electrode of an amplifying MOS transistor (not shown). Reference numeral 17 is an element-isolating insulating film, which is called a “LOCOS” oxide film. Reference numeral 29 is a p+ channel stopper, which is formed under the element-isolating insulating film 17 and has a doping concentration higher than the p well 12.
FIG. 16 is a schematic sectional view of the solid-state image sensing device shown in FIG. 14. This sectional view shows a combination of portions corresponding to the photodiode 1 and the transfer MOS transfer 2 shown in FIG. 14. Reference numeral 11 represents an n-type silicon substrate, 12 is a p well, 13a is a gate oxide film of the transfer MOS transistor 2, 13b is a thin oxide film provided on a light-receiving portion, 14 is the gate electrode of the transfer MOS transistor f, and 15 is an n-type cathode of the photodiode 1. Reference numeral 16 represents a p-type surface region for providing a photodiode-buried structure, and 17 is a LOCOS oxide film for element isolation. Reference numeral 18 is a heavily-doped n-type region that forms a floating diffusion region and also acts as the drain region of the transfer MOS transistor 2. Reference numeral 19 is a silicon oxide film for providing insulation between the gate electrode and a first metal layer 21. Reference numeral 20 is a contact plug, 22 is an interlayer insulating film for providing insulation between the first metal layer 21 and a second metal layer 23, 24 is an interlayer insulating film for providing insulation between the second metal layer 23 and a third metal layer 25, and 26 is a passivation film. For a color photoelectrical conversion device, a color filter layer (not shown) is formed at the upper layer of the passivation film 26 and a micro-lens (not shown) is further formed thereon to improve the sensitivity. Incident light through the surface enters the photodiode through an aperture where the third metal layer 25 is not provided. The light is absorbed by the n-type cathode 15 of the photodiode or the p well layer 12, so that electron-hole pairs are produced. Of these pairs, electrons are stored in an n-type cathode region.
U.S. Pat. No. 6,403,998 discloses a solid-state image sensor in which a p-type buried layer is formed at a predetermined distance from an n-type substrate and a photoelectric conversion section is formed thereabove. In addition, U.S. Pat. No. 6,504,193 discloses a solid-state image device in which one end of a photodiode is formed to extend to a position under a readout gate and a punch-through stopper region is formed under a signal detection portion, which corresponds to the drain region, to be in self-alignment with the gate electrode.
With the conventional structures shown in FIGS. 15 and 16, however, part of signal charge generated below the photodiode is not absorbed by the photodiode, and is, in turn, absorbed by the FD region 18 and the source and drain regions of the transistor within the pixel. As a result, the sensitivity decreases.
Additionally, although various improvements have been made to CMOS solid-state image sensing devices, there is still a problem in that the sensitivity is low, particularly, in a device having a small pixel size. The present invention provides a CMOS solid-state image sensing device that has a novel structure and that can provide high sensitivity even for micro pixels.
A description is now given to a reason why the sensitivity in the conventional structure shown in FIG. 16 is low. Referring to FIG. 16, electrons that are generated from a light ray 27 entering the aperture are successfully stored in the n-type cathode region and serve as an effective signal charge. However, for example, as in the case of a light ray 28, electrons that are generated at a position somewhat away from the photodiode may be captured, not by the n-type cathode region, but by the n+ type floating diffusion region 18 where the potential is lower. In addition, even immediately under the photodiode, as a result of repeated diffusion and drift of electrons, the electrons are absorbed by a low potential region other than the photodiode with a certain probability and thus do not contribute as photoelectric conversion signals. When the n-type cathode 15 is formed at a position deeper relative to the silicon surface, such an arrangement facilitates the photodiode to collect the electrons. However, since the n-type cathode region is formed in the p well region 12 by ion implantation, the doping concentration cannot be reduced so significantly. This conventional structure also has a problem in that the n-type cathode 15 cannot be formed with a high doping concentration at a considerably deep position, due to the limitation of depletion behavior of the n-type cathode 15.
Thus, the volume of the n-type cathode, which provides the photodiode, is limited. Consequently, a sufficient ability of collecting electrons generated from incident light cannot be achieved, resulting in low sensitivity.
Meanwhile, the conventional structure disclosed in U.S. Pat. No. 6,403,998 also cannot prevent electrons that are generated at a deep position in response to incident light from being absorbed by the floating diffusion region 18 or the like, since no potential barrier is provided under the signal readout gate. Thus, this structure also has a problem in that the sensitivity decreases. Also, the conventional structure disclosed in U.S. Pat. No. 6,504,193 cannot prevent some of electrons that are generated from incident light from being absorbed by the source and drain of another transistor in the pixel or from being absorbed by adjacent pixels, since the punch-through stopper region is formed only under a signal detection portion. Thus, this structure also has a problem in that the sensitivity decreases as well.